The inventive concept relates to a method of manufacturing a semiconductor device, and more particularly, to a method of manufacturing a semiconductor device having a capacitor under bit line (CUB) structure.
Embedded semiconductor devices, in which products having various structures are integrated, are widely being employed. The embedded semiconductor device can include a memory device and a logic device that are integrated in one chip and that are formed of a cell array area and a logic circuit area, respectively. A plurality of memory cells is arranged in the cell array area and information stored in the cell array area is generated as new information by a logic circuit.
A memory device included in an embedded semiconductor device may be a dynamic random access memory (DRAM) or a static random access memory (SRAM). A capacitor of a DRAM may have a CUB structure that is formed before a bit line is formed or may have a capacitor over bit line (COB) structure that is formed after a bit line is formed. A process for fabricating a capacitor having a CUB structure is simpler than that of a capacitor having a COB structure, such that a capacitor having a CUB structure is more commonly used in an embedded semiconductor device.
In a CUB structure, the upper electrode of the capacitor can be in close proximity to a bit line. In order to prevent coupling capacitance between the upper electrode of the capacitor and the bit line, the thickness of an insulating layer interposed between the upper electrode and the bit line may be greater than or equal to a predetermined thickness. However, the thickness of the insulating layer in the logic area is relatively great and thus the depth of deep contact holes is increased, thereby creating a difficulty in forming of the deep contact holes.